Final v0.3.3 validation evidence [M] · actual executed 7a0c93ff4d19b1892067711d884739d246432344; original CPU-WRF reference. Strict24 PASS; raw full D6 PASS; raw integrity PASS; frozen integrity annex PASS. D6 and all-frame integrity pass. Strict24 · Full D6 · Raw integrity · Annex
All native stored cells, no masks; finite-first [M]. Blue: GPU-versus-original-CPU RMSE; orange: signed mean bias. Dark/light bands: spatial |error| p25–p75/p5–p95, not confidence intervals. No paired comparator is available; diagnostic GPU-versus-original-CPU only. Ratio row: deviation RMSE / pair RMSE where defined; reference lines1/2. The50% rule applies only to frozen D6 exceedance frames; zero denominators stay undefined. Dashed/off-scale arrow: unchanged D6 limit; hourly rain tau0 is undefined and its accumulated limit is informational.
Actual source-labelled comparison against original CPU-WRF; releasebe0 via explicit nativeBYTE628 bridge where measured source is7a. Frozen raw failures, frozen annex and manager Owner-ledger dispositions remain distinct; no source-execution relabel.
Ratio 2 = 50% pair/RC rule; a single pair is not a confidence interval. Ratio > 2 at small absolute error is expected where the CPU pair is near zero (early leads, d01); the 50% rule is applied only to D6 exceedance frames.
Summary n=1: cross-case sample SD is unavailable. Final summaries will show all cases and pointwise mean ± one sample SD per domain.
Plotted numerical data and source hashes






















